The Translation Lookaside Buffer (TLB) is a covert cache that stores virtual-to-physical address translations on x86 processors, eliminating the need for expensive multi-level page table walks on every memory access. Introduced with Intel's 80386 in 1985, the TLB predates on-chip data caches and remains invisible to applications but critical for operating system performance, especially under virtualization where nested paging can require up to 24 memory references without cached translations.