Vol. I · Public prior art
Compiling diagrams into machines.
A public atlas of 89 patents on graphical programs, formal specifications, and the compilers that lower them onto computers and FPGAs.
The compilation path these patents occupy
Not one product: a job. A diagram or a formal spec becomes an IR, then software, HDL, or a bitstream — sometimes all three.
- 01DiagramBlocks, graphs, statecharts
- 02IRTypes, clocks, constraints
- 03PartitionCPU · FPGA · mixed
- 04EmitCode, HDL, bitstream
- 05CheckProbe, test, prove
- 32 documentsLabVIEWGraphical dataflow → CPU, FPGA, and mixed targets
- 19 documentsSimulinkBlock diagrams and statecharts → embedded code and HDL
- 19 documentsFormal specFormal descriptions → verified software and circuits
- 1 documentsUML → HDLSystems modeling languages lowered to hardware description
- 15 documentsVisual programmingDiagrams, dataflow, and visual specs outside the two vendor stacks
- 3 documentsHardware compilationHigh-level programs and FPGA-as-software, plus formal hardware checks
Flagship documents
- US4901221AGraphical system for modelling a process and associated method1990granted
- US6219628B1Configuring an instrument using conversion of graphical programs into hardware implementations2001granted
- US8701081B2Hardware-specific code generation from a graphical model2014granted
- US5101491ASynthesizing, generating and checking software from a formal description1992granted
- US6230307B1Programming FPGAs and related reconfiguration resources as if they were software2001granted